A single-chip microcomputer is a digital processor constructed in a single semiconductor integrated circuit containing a read-only memory for program storage, a read/write memory for data storage, and an arithmetic/logic unit, with control circuitry for executing instruction codes stored in the read-only memory. This code is permanently defined when the semiconductor device is manufactured, so the program cannot be updated or corrected after installation of the part in a system, except by manufacturing a new microcomputer device with different masks to provide the new program code and installing the new device. Aside from the cost, the delay in obtaining microcomputer devices with updated or corrected code is a major factor, measured in months. This delay is in large part administrative, although the procedure includes writing and specifying a new code and debugging the code on emulators, generating new masks, processing semiconductor slices, probe testing, packaging the bars tested good, retesting the finally-assembled units, shipping to the equipment manufacturer, distribution of parts to inventory for the assembly line, final test of systems, etc.
These cost and delay factors have often resulted in the choice of microprocessor devices with off-chip PROM or EPROM program memory instead of microcomputers, even though this alternative is much more expensive. A combined ROM/EPROM with periodic branch from ROM to EPROM as in pending U.S. patent application Ser. No. 194,538 filed Oct. 6, 1980, assigned to Texas Instruments, is one approach to reducing cost by using more ROM instead of more expensive EPROM, yet still allow patching.
Semiconductor devices are most economical when manufactured in large volume, preferrably lots of hundreds of thousands of identical units, so a microcomputer is chosen for a system design only when large manufacturing volumes are involved. This can result in waste, however, because if an error is discovered in the code at a late stage in prototyping or preliminary production, there will be large numbers of microcomputer devices in the "pipeline" at the various stages of production, testing and delivery; all of these must be scrapped and new code introduced. To remedy this problem, microcomputer devices are produced with on chip electrically programmable ROMs instead of mask-programmable ROMs for on-chip program storage, but these require a more complex manufacturing process, larger chip sizes, and additional circuitry and terminals for the programming function, as well as having the disadvantage of reduced reliability. These EPROM microcomputers are suitable for the development and prototyping phase, but when the stage of large-volume production is reached the program code is usually committed to mask-programmable ROM for cost considerations. The development and prototyping phases are thus taken care of, but system customizing or retrofitting produces the same delays as before.
It is therefore the principal object of this invention to provide an improved microcomputer system in which correction of programming errors, or program updates, and custom programs or changes in the program code, are all possible even though mask-programmable on-chip ROM is used for program storage. Another object is to provide a method of patching programs executed by a processor.